By analyzing test patterns, silicon data, and defect signatures, you identify root causes and drive targeted improvements in design, test quality, and methodologies. * Experience and Knowledge: several years of experience in digital ASIC development, including top-level integration; strong expertise in ATPG, test methodologies, and coverage analysis; hands-on experience with ATPG tools and flows; experience in failure analysis using pattern and silicon data; proven experience as Digital Lead in project environments; experience in coordinating external development partners and cross-functional teams; solid understanding of digital verification and interface validation; strong scripting skills (Python, Tcl, or shell); experience in methodology and flow development in digital and ATPG domains
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